It is known in the art to differentiate between microprocessors of the same family via whether a control register bit is both readable and writable. In particular, it is possible to distinguish between various generations of the Intel x86 family of microprocessors (including the 8086, 80286, 80386, 80486, Pentium and Pentium Pro microprocessors) using this technique. U.S. Pat. No. 5,426,767 METHOD FOR DISTINGUISHING BETWEEN A 386-TYPE CENTRAL PROCESSING UNIT AND A 286-TYPE CENTRAL PROCESSING UNIT issued Feb. 6, 1996 discloses a method to determine if a particular microprocessor is an Intel 80286 or an Intel 80386. This method detects whether bits 12, 13 and 14 of the EFLAGS register may be set to "1". The method generally includes: a write to the EFLAGS register with bits 12, 13, and 14 of the write data set to "111"; a read of the EFLAGS register; and an examination of bits 12, 13, and 14. In an Intel 80286, these bits cannot be set to "1" but are always read as "0". Thus if these bits are "0", the microprocessor is a 80286. In an Intel 80386, these bits may be written set to "1" via a register write instruction. In subsequent reads of the EFLAGS register, these bits would be read as "1". Thus if these bits are read as "1", then the microprocessor is a 80386.
Intel has a practice of employing more bits of the EFLAGS register with each new generation of microprocessors in this family. Thus the new generation of microprocessor changes particular bits from nonwritable/readable only as "0" to both readable and writable as compared with the prior generation. In some cases the particular EFLAGS bits are used for expanded functions in the higher generation. In other cases, the mere fact that a particular bit in the EFLAGS register is both readable and writable indicates that some other expanded function is available in the higher generation. This is the case for the CPUID instruction as disclosed in UK published patent application GB 2,270,176 A entitled "IDENTIFYING A COMPUTER MICROPROCESSOR." Therefore in general, it is possible to distinguish between adjacent pairs of processor generations in the Intel x86 family by whether particular bits of the EFLAGS register are both readable and writable. Independent software developers writing programs for computers using the Intel x86 family of microprocessors typically employ a series of such EFLAGS bits tests to determine the generation of a particular microprocessor within the family. This permits the independent software developer to select between program modules based upon the detected generation. Thus programs may be written to take advantage of features of later generations of the microprocessor family, which are presumably more powerful, and switch to alternate presumably less powerful code for earlier generations without the later added feature. This permits compatibility with plural generations of the microprocessor family while employing more powerful features of later generations.
Recently the possibility of construction of a single chip microprocessor with patchable microcode has become feasible. Thus the possible functions of the microprocessor need not be fixed upon manufacture. U.S. Provisional Patent Application Ser. No. 60/013,043 entitled SINGLE CHIP MICROPROCESSOR CIRCUITS, SYSTEMS, AND METHODS FOR SELF-LOADING PATCH MICRO-OPERATION CODES AND PATCH MICROINSTRUCTION CODES and U.S. Provisional Patent Application Ser. No. 60/013,058 entitled MICROPROCESSOR WITH CIRCUITS, SYSTEMS, AND METHODS FOR OPERATING WITH PATCH MICRO-OPERATION CODES AND PATCH MICROINSTRUCTION CODES STORED IN MULTI-PURPOSE MEMORY STRUCTURE, both filed Mar. 8, 1996, disclose a single chip microprocessor in which external systems enable microcode patches. These microcode patches enable change of the functionality of the microprocessor after manufacture. Such microcode patches may be used to correct bugs in the original microprocessor after manufacture even in the possession of the end user. Such bugs include erroneous or anomalous operations produced by errors in the original design. One infamous example of such a bug is the erroneous operation of the floating point divide instruction in response to some data patterns in the Intel Pentium microprocessor. These microcode patches may also be used to add functionality to the microprocessor after manufacture. Depending upon the particular added feature, this microcode patch technique may be capable of adding additional features first implemented by Intel in later generations of the microprocessor family. However, software produced by independent software developers may not be able to take advantage of this microcode patch. Programs developed to take advantage of the new feature would ordinarily check the newly read/writable EFLAGS bit of that generation of microprocessors to determine if the particular microprocessor is of a generation that supports this new feature. An older generation microprocessor with the new feature implemented in patched microcode would fail this test. Thus the independently developed program would not use the new feature implemented in patched microcode because it would not realize the microprocessor supports the new feature.